1 power mosfet IRFB20N50K, sihfb20n50k features ? low gate charge q g results in simple drive requirement ? improved gate, avalanche and dynamic dv/dt ruggedness ? fully characterized capacitance and avalanche voltage and current ?low r ds(on) ? lead (pb)-free available applications ? switch mode power supply (smps) ? uninterruptible power supply ? high speed power switching ? hard switched and high frequency circuits notes a. repetitive rating; pulse width limi ted by maximum junction temperature. b. starting t j = 25 c, l = 1.6 mh, r g = 25 , i as = 20 a. c. i sd 20 a, di/dt 350 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. product summary v ds (v) 500 r ds(on) ( )v gs = 10 v 0.21 q g (max.) (nc) 110 q gs (nc) 33 q gd (nc) 54 configuration single n -channel mosfet g d s to-220 g d s a v aila b le rohs* compliant ordering information package to-220 lead (pb)-free IRFB20N50Kpbf sihfb20n50k-e3 snpb IRFB20N50K sihfb20n50k absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 500 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 20 a t c = 100 c 12 pulsed drain current a i dm 80 linear derating factor 2.2 w/c single pulse avalanche energy b e as 330 mj repetitive avalanche current a i ar 20 a repetitive avalanche energy a e ar 28 mj maximum power dissipation t c = 25 c p d 280 w peak diode recovery dv/dt c dv/dt 6.9 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d mounting torque 6-32 or m3 screw 10 n * pb containing terminations are not rohs compliant, exemptions may apply www.kersemi.com
2 IRFB20N50K, sihfb20n50k notes a. repetitive rating; pulse width limi ted by maximum junction temperature. b. pulse width 400 s; duty cycle 2 %. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -58 c/w case-to-sink, flat, greased surface r thcs 0.50 - maximum junction-to-case (drain) r thjc -0.45 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 500 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.61 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 3.0 - 5.0 v gate-source leakage i gss v gs = 30 v - - 100 na zero gate voltage drain current i dss v ds = 500 v, v gs = 0 v - - 50 a v ds = 400 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 12 a b - 0.21 0.25 forward transconductance g fs v ds = 50 v, i d = 12 a 11 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 - 2870 - pf output capacitance c oss - 320 - reverse transfer capacitance c rss -34- output capacitance c oss v gs = 0 v v ds = 1.0 v, f = 1.0 mhz - 3480 - v ds = 400 v, f = 1.0 mhz - 85 - effective output capacitance c oss eff. v ds = 0 v to 400 v - 160 - total gate charge q g v gs = 10 v i d = 20 a, v ds = 400 v see fig. 6 and 13 b - - 110 nc gate-source charge q gs --33 gate-drain charge q gd --54 turn-on delay time t d(on) v dd = 250 v, i d = 20 a r g = 7.5 , v gs = 10 v, see fig. 10 b -22- ns rise time t r -74- turn-off delay time t d(off) -45- fall time t f -33- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --20 a pulsed diode forward current a i sm --80 body diode voltage v sd t j = 25 c, i s = 20 a, v gs = 0 v b --1.5v body diode reverse recovery time t rr t j = 25 c, i f = 20 a, di/dt = 100 a/s b - 520 780 ns body diode reverse recovery charge q rr -5.38.0c forward turn-on time t on intrinsic turn-on time is neglig ible (turn-on is dominated by l s and l d ) s d g www.kersemi.com
3 IRFB20N50K, sihfb20n50k typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature 0.1 1 10 100 v ds , drain-to-so u rce v oltage ( v ) 0.01 0.1 1 10 100 i d , drain-to-so u rce c u r rent (a) 5.0 v 20 s p u lse w idth t j = 25 c v gs 15 v 12 v 10 v 8 .0 v 7.0 v 6.0 v 5.5 v bottom 5.0 v top 0.1 1 10 100 v ds , drain-to-so u rce v oltage ( v ) 0.01 0.1 1 10 100 i d , drain-to-so u rce c u r rent (a) v gs 15 v 12 v 10 v 8 .0 v 7.0 v 6.0 v 5.5 v bottom 5.0 v top 5.0 v 20 s p u lse w idth t j = 25 c 5.0 6.0 7.0 8.0 9.0 10.0 v , gs gate-to-source voltage (v) 0.0 0.1 1.0 10.0 100.0 t j = 25 c v ds = 50 v 20 ms pulse width i d , drain-to-source cur rent (a) t j = 150 c - 60 - 40 - 20 0 20 40 60 8 0 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 r ds(on) , drain-to-so u rce on-resistance (normalised) t j , j u nction temperat u re (c) v i = gs d 20 a = 10 v www.kersemi.com
4 IRFB20N50K, sihfb20n50k fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area 1 10 100 1000 v ds , drain-to-so u rce v oltage ( v ) 10 100 1000 10000 100000 c, capacitance (pf) c iss c oss c rss v gs = 0 v , f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 20 40 60 8 0 100 120 0 4 8 12 16 20 q g , total gate charge (nc) v gs , gate-to-so u rce v oltage ( v ) for test circ u it see fig u re 13 ? ? ? ??? v ds = 400 v v ds = 250 v v ds = 100 v 0.2 0.4 0.6 0. 8 1.0 1.2 v sd , so u rce-to drain v oltage ( v ) 0.1 1.0 10.0 100.0 i sd , re v erse drain c u rrent (a) t j = 150 c t j = 25 c v gs = 0 v 1 10 100 1000 10000 v ds , drain-to-so u rce v oltage ( v ) 0.1 1 10 100 1000 i d , drain-to-so u rce c u rrent (a) t c = 25 c t j = 150 c single p u lse 1 ms 10 ms operation in this area limited b y r ds(on) 100 s www.kersemi.com
5 IRFB20N50K, sihfb20n50k fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case fig. 12a - unclamped inductive test circui t fig. 12b - unclamped inductive waveforms 25 50 75 100 125 150 0 4 8 12 16 20 i d , drain c u rrent (a) v ds p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. 10 v + - v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 n otes: 1. d u ty factor d = t 1 /t 2 2. peak t j = p dm x t thjc + t c p t t dm 1 2 t 1 , rectang u lar p u lse d u ration (s) thermal response ( z thjc ) 0.01 0.02 0.01 0.10 0.20 d = 0.50 single p u lse (thermal response) a a r g i as 0.01 t p d.u.t l v ds + - v dd dri v er a 15 v 20 v i as v ds t p www.kersemi.com
6 IRFB20N50K, sihfb20n50k fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit 25 50 75 100 125 150 0 100 200 300 400 500 600 e as , single p u lse a v alanche energy (mj) i d 9.4 a 17 a 20a top bottom q gs q gd q g v g charge v gs d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + - www.kersemi.com
7 IRFB20N50K, sihfb20n50k fig. 14 - for n-channel p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices peak diode recovery dv/dt test circuit r g v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t. circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer www.kersemi.com
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